1. Field of the Invention
The present invention relates to a semiconductor mounting substrate on which a semiconductor device is mounted via solder bumps, and a method for manufacturing the same.
2. Description of the Related Art
In the following, a conventional semiconductor mounting substrate is described with reference to drawings. FIG. 13 is a front view of a conventional semiconductor mounting substrate. FIG. 14 is an expanded front view of a mounting condition of a corner part of a semiconductor device on this semiconductor mounting substrate. Recently, in order to respond to the demand for reduction in size of devices, semiconductor mounting substrate 10 has appeared which is obtained by flip-chip mounting semiconductor device 2 facedown on substrate 1, as shown in FIG. 13. Such a mounting means has been applied especially to mobile devices, typified by cellular phones, for achieving both portability and high functionality.
In such semiconductor mounting substrate 10, semiconductor device 2 and electronic component 3 are mounted on substrate 1, as shown in FIGS. 13 and 14. Solder bumps 4 are formed on semiconductor device 2, and semiconductor device 2 is connected to substrate 1 via solder bumps 4. Resin 5 is filled between substrate 1 and semiconductor device 2.
Here, as shown in FIG. 14, resin film (so called rewiring layer) 2b is formed on a lower face side of silicon substrate 2a in semiconductor device 2. Wiring formed on this resin film 2b connects a circuit (not shown) formed on silicon substrate 2a and solder bumps 4, as shown in FIG. 13.
It is to be noted that as a prior art document information related to invention of such a semiconductor mounting substrate, for example, Unexamined Japanese Patent Publication No. H08-241900 is known.
Next, a method for manufacturing the conventional semiconductor mounting substrate is described with reference to drawings. FIG. 15 is a manufacturing flowchart for the conventional semiconductor mounting substrate, FIG. 16A is a plan view of a semiconductor mounting substrate in an injection process in the manufacturing flowchart, and FIG. 16B is a front view of the semiconductor mounting substrate in the same injection process. In the following, a method for manufacturing the conventional semiconductor mounting substrate is described in the order of processes shown in FIG. 15.
Application process S1 is a process of supplying substrate 1 with solder 4a and flux 4b. It is to be noted that cream solder is used as solder 4a. Mounting process S2 after application process S1 is a process of mounting chip components 3a and semiconductor device 2 on substrate 1. At this time, chip component 3a and semiconductor device 2 are mounted with a spacing of about 0.15 mm therebetween. It is to be noted that a semiconductor device provided with solder bumps (not shown) is applied to semiconductor device 2. Reflow process S3 after mounting process S2 is a process of melting solder 4a and the solder bumps so that chip components 3a and semiconductor device 2 are connected to substrate 1.
Injection process S4 after reflow process S3 is a process of injecting resin 5 into a gap between semiconductor device 2 and substrate 1. In hardening process S5 after this injection process S4, resin 5 is hardened, to complete semiconductor mounting substrate 10.
It is to be noted that as a prior art document related to invention of such a method for manufacturing the semiconductor mounting substrate, for example, Unexamined Japanese Patent Publication No. H11-214586 is known.
However, in the case of filling first resin 5 between substrate 1 and semiconductor device 2 in such a conventional semiconductor mounting substrate, as shown in FIGS. 13 and 14, interface 2e between silicon substrate 2a and resin film 2b is not covered by first resin 5 and comes into an exposed state on side face 2c of the corner part of semiconductor device 2. When interface 2e comes into the exposed state as thus described, connection strength between silicon substrate 2a and resin film 2b is decreased. Hence there is a problem in that, when semiconductor mounting substrate 10 is dropped, peeling is apt to occur in interface 2e portion between silicon substrate 2a and resin film 2b. 
Next, a problem with the method for manufacturing the conventional semiconductor mounting substrate shown in FIGS. 15, 16A and 16B is described. FIG. 17A is a sectional view of chip component 3a mounted on the conventional semiconductor mounting substrate (not shown), and FIG. 17B is a sectional view of a soldered place of chip component 3a shown in FIG. 17A, seen from a line 17B-17B.
In such a method for manufacturing conventional semiconductor mounting substrate 10, when a distance between semiconductor device 2 and adjacent chip component 3a is small, adjacent electronic component 3a and solder 4a are covered by first resin 5 in injection of first resin 5 between substrate 1 and semiconductor device 2. Here, a space between chip component 3a and substrate 1 is narrower than a space between substrate 1 and semiconductor device 2. Thereby, first resin 5 is resistant to entering into the space between chip component 3a and substrate 1. Therefore, as shown in FIGS. 17A and 17B, chip component 3a and solder 4a are covered by first resin 5 in a state where unfilled void 7 is formed between chip component 3a and substrate 1.
Further, for example when such semiconductor mounting substrate 10 is reflow-soldered to a parent substrate (not shown), solder 4a melts by heating. Since solder 4a is covered by first resin 5 except in void 7 at this time, solder 4a begins flowing in directions of arrows 7a in void 7 due to cubical expansion in melting of the solder. Solder 4a then flows into a lower side of chip component 3a from both sides of void 7, to cause a short circuit. Therefore, there has been a problem with conventional semiconductor mounting substrate 10 in that the distance between chip component 3a and semiconductor device 2 cannot be made small, thereby preventing high-density mounting.